CLKSRC=SELECTS_THE_INTERNAL
Clock Source Select Register
CLKSRC | Selects the clock source for PLL0 as follows. Warning: Improper setting of this value, or an incorrect sequence of changing this value may result in incorrect operation of the device. 0 (SELECTS_THE_INTERNAL): Selects the Internal RC oscillator as the PLL0 clock source (default). 1 (SELECTS_THE_MAIN_OSC): Selects the main oscillator as the PLL0 clock source. Select the main oscillator as PLL0 clock source if the PLL0 clock output is used for USB or for CAN with baudrates > 100 kBit/s. 2 (SELECTS_THE_RTC_OSCI): Selects the RTC oscillator as the PLL0 clock source. 3 (RESERVED): Reserved, do not use this setting. |
RESERVED | Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined. |